Which of the following logic gate is a universal gate?
1. OR
2. NOT
3. AND
4. NOR

Let ${\mathrm{n}}_{\mathrm{P}}$ and ${\mathrm{n}}_{\mathrm{e}}$ be the number of holes and conduction electrons respectively in a semiconductor. Then

(1) ${\mathrm{n}}_{\mathrm{P}}$>${\mathrm{n}}_{\mathrm{e}}$ in an intrinsic semiconductor

(2) ${\mathrm{n}}_{\mathrm{P}}$=${\mathrm{n}}_{\mathrm{e}}$ in an extrinsic semiconductor

(3) ${\mathrm{n}}_{\mathrm{P}}$=${\mathrm{n}}_{\mathrm{e}}$ in an intrinsic semiconductor

(4) ${\mathrm{n}}_{\mathrm{e}}$<${\mathrm{n}}_{\mathrm{P}}$ in an intrinsic semiconductor

The energy gap of silicon is 1.14 eV. The maximum wavelength at which silicon will begin absorbing energy is

(1) 10888 Å                   

(2) 1088.8 Å

(3) 108.88 Å                   

(4) 10.888 Å

The energy band diagrams for three semiconductor samples of silicon are as shown. We can then assert that

(1) Sample X is undoped while samples Y and Z have been doped with a third group and a fifth group impurity respectively

(2) Sample X is undoped while both samples Y and Z have been doped with a fifth group impurity

(3) Sample X has been doped with equal amounts of third and fifth group impurities while samples Y and Z are undoped

(4) Sample X is undoped while samples Y and Z have been doped with a fifth group and a third group impurity respectively

The temperature (T) dependence of resistivity ($\rho$) of a semiconductor is represented by

1. 

2. 

3. 

4. 

In the half-wave rectifier circuit shown. Which one of the following wave forms is true for ${\mathrm{V}}_{\mathrm{CD}}$, the output across C and D?

1. 

2. 

3. 

4. 

Zener diode is used for:-

1.  Rectification

2.  Stabilisation

3.  Amplification

4.  Producing oscillations in an oscillator

The Boolean equation of NOR gate is 

(1) C = A + B

(2) $\mathrm{C}=\overline{\mathrm{A}+\mathrm{B}}$ 

(3) $C=A·B$ 

(4) $\mathrm{C}=\overline{\mathrm{A}.\mathrm{B}}$

 The logic behind the ‘NOR’ gate is that it gives

(1) High output when both the inputs are low

(2) Low output when both the inputs are low

(3) High output when both the inputs are high

(4) None of these

The combination of ‘NAND’ gates shown here under (figure) are equivalent to

1. An OR gate and an AND gate respectively
2. An AND gate and a NOT gate respectively
3. An AND gate and an OR gate respectively
4. An OR gate and a NOT gate respectively.