In a common emitter transistor, the current gain is 80. What is the change in collector current, when the change in base current is 250 $\mathrm{\mu }$A 
(1) 80 $\times$ 250 $\mathrm{\mu }$A

(2) (250 – 80) $\mathrm{\mu }$A

(3) (250 + 80) $\mathrm{\mu }$A

(4) 250/80 $\mathrm{\mu }$A

Least doped region in a transistor 

(1) Either emitter or collector

(2) Base

(3) Emitter

(4) Collector

The symbol given in figure represents 

(1) NPN transistor

(2) PNP transistor

(3) Forward biased PN junction diode

(4) Reverse biased NP junction diode

The part of a transistor which is heavily doped to produce a large number of majority carriers is-

1. Base                 

2. Emitter

3. Collector           

4. None of these

In NPN transistor the collector current is 10 mA. If 90% of electrons emitted reach the collector, then

(1) Emitter current will be 9 mA

(2) Emitter current will be 11.1 mA

(3) Base current will be 0.1 mA

(4) Base current will be 0.01 mA

The combination of ‘NAND’ gates shown here under (figure) are equivalent to

1. An OR gate and an AND gate respectively
2. An AND gate and a NOT gate respectively
3. An AND gate and an OR gate respectively
4. An OR gate and a NOT gate respectively.

 The logic behind the ‘NOR’ gate is that it gives

(1) High output when both the inputs are low

(2) Low output when both the inputs are low

(3) High output when both the inputs are high

(4) None of these

The Boolean equation of NOR gate is 

(1) C = A + B

(2) $\mathrm{C}=\overline{\mathrm{A}+\mathrm{B}}$ 

(3) $C=A·B$ 

(4) $\mathrm{C}=\overline{\mathrm{A}.\mathrm{B}}$

Which of the following logic gate is a universal gate?
1. OR
2. NOT
3. AND
4. NOR

Let ${\mathrm{n}}_{\mathrm{P}}$ and ${\mathrm{n}}_{\mathrm{e}}$ be the number of holes and conduction electrons respectively in a semiconductor. Then

(1) ${\mathrm{n}}_{\mathrm{P}}$>${\mathrm{n}}_{\mathrm{e}}$ in an intrinsic semiconductor

(2) ${\mathrm{n}}_{\mathrm{P}}$=${\mathrm{n}}_{\mathrm{e}}$ in an extrinsic semiconductor

(3) ${\mathrm{n}}_{\mathrm{P}}$=${\mathrm{n}}_{\mathrm{e}}$ in an intrinsic semiconductor

(4) ${\mathrm{n}}_{\mathrm{e}}$<${\mathrm{n}}_{\mathrm{P}}$ in an intrinsic semiconductor