Q. No.In the circuit shown, \(5~\text{V}\) represents TRUE (binary \(1\)) and \(0~\text V\) represents FALSE (binary \(0\)). The diodes are ideal. \(A,B,C\) are the inputs and \(Y\) the output. What logic does the circuit represent?
| 1. | AND \((A,B,C)\) | 2. | OR \((A,B,C)\) |
| 3. | NOT \(\bigg(\text{AND }(A,B,C)\bigg)\) | 4. | NOT \(\bigg(\text{OR }(A,B,C)\bigg)\) |
Subtopic: Logic gates |
Level 4: Below 35%
Hints
If an AND-gate and an OR-gate are OR-ed together, the resulting gate is:
1. AND
2. OR
3. XOR
4. none of the above
1. AND
2. OR
3. XOR
4. none of the above
Subtopic: Logic gates |
Level 3: 35%-60%
Hints
The output \((Y)\) of the digital logic circuit shown in the diagram is:
| 1. | \(A~\text{AND}~B~\text{AND}~C\) | 2. | \((A~\text{AND}~B)~\text{OR}~C\) |
| 3. | \(B~\text{OR}~C\) | 4. | none of these |
Subtopic: Logic gates |
Level 3: 35%-60%
Hints
The truth table for a circuit is given by:
Here, \(X\) represents either \(0\) or \(1\). \(A,B,\) and \(C\) are the inputs. Which of the following is the correct circuit?
| \(A\) | \(B\) | \(C\) | \(Y\) (Output) |
| \(1\) | \(X\) | \(1\) | \(1\) |
| \(0\) | \(1\) | \(X\) | \(1\) |
| All other cases | \(0\) | ||
| 1. |  |
| 2. |  |
| 3. |  |
| 4. |  |
Subtopic: Logic gates |
55%
Level 3: 35%-60%
Hints
By writing down the truth table or otherwise, determine the output \(X\) of the circuit given below.
| 1. | \(A\) | 2. | \(B\) |
| 3. | \(A~\text{or}~B\) | 4. | NOT \((A)\) |
Subtopic: Logic gates |
55%
Level 3: 35%-60%
Hints
The output of the above circuit is:
| 1. | (\(A\) AND \(B\)) | 2. | (\(A\) OR \(B\)) |
| 3. | (\(B\) OR \(C\)) | 4. | none of the above |
Subtopic: Logic gates |
55%
Level 3: 35%-60%
Hints
The output of the circuit given in the diagram is:
| 1. | \(A\) AND \(B\) | 2. | \(A\) OR \(B\) |
| 3. | \(A\) | 4. | \(B\) |
Subtopic: Logic gates |
58%
Level 3: 35%-60%
Hints
Which of the following represents a circuit that gives an output (i.e. true) when both its inputs are equal?
| 1. |  |
| 2. |  |
| 3. |  |
| 4. |  |
Subtopic: Logic gates |
57%
Level 3: 35%-60%
Hints
The output \((Y)\) of the logic circuit given above is:
1. \(A\) AND \(C\)
2. \(A\) OR \(C\)
3. always TRUE
4. always FALSE
1. \(A\) AND \(C\)
2. \(A\) OR \(C\)
3. always TRUE
4. always FALSE
Subtopic: Logic gates |
59%
Level 3: 35%-60%
Hints
Consider the circuit shown in the above diagram. The output \((Y)\) of the circuit does not depend on \(A.\) Then, \(Y=\)
1. \(B\) AND \(C\)
2. \(B\) OR \(C\)
3. \(B\)
4. \(C\)
1. \(B\) AND \(C\)
2. \(B\) OR \(C\)
3. \(B\)
4. \(C\)
Subtopic: Logic gates |
67%
Level 2: 60%+
Hints
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