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Q. No.Assuming that the diode is ideal, the output waveform for the circuit (shown in the figure) is:
1.
2.
3.
4.
Subtopic: Rectifier |
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In a \(\mathrm{p\text-n}\) junction, the potential barrier is due to the charges on either side of the junction, these charges are:
| 1. | majority carriers |
| 2. | minority carriers |
| 3. | fixed donor and acceptor ions |
| 4. | both (1) and (2) |
Subtopic: PN junction |
54%
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The breakdown in a reverse-biased p-n junction diode is more likely to occur due to:
| 1. | Large velocity of the minority charge carriers if the doping concentration is small. |
| 2. | Large velocity of the minority charge carriers if the doping concentration is large. |
| 3. | A strong electric field in a depletion region if the doping concentration is small. |
| 4. | Weak electric field in a depletion region if the doping concentration is small. |
Subtopic: PN junction |
From NCERT
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The peak voltage in the output of a half-wave rectifier is \(30 ~\text{V}.\) The RMS voltage of the output wave is: (assuming no distortion in wave)
| 1. | \(\dfrac{30}{\sqrt2}~\text{V}\) | 2. | \(15 ~\text{V}\) |
| 3. | \(\dfrac{15}{\sqrt2}~\text{V}\) | 4. | \(10 ~\text{V}\) |
Subtopic: Rectifier |
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A voltage \(V_{AB}\) is applied to the left side input and the potential differences \(V_{AX}\) and \(V_{XY}\) are measured. Assume the diodes are ideal i.e., there is no potential difference across the diodes in forward bias. Which of the following is true?
1. \(\text{If}~V_{AB}>0, V_{AX}>0\)
2. \(\text{If}~V_{AB}>0, V_{XY}>0\)
3. \(\text{If}~V_{AB}<0, V_{XY}>0\)
4. \(\text{If}~V_{AB}<0, V_{AX}>0\)
1. \(\text{If}~V_{AB}>0, V_{AX}>0\)
2. \(\text{If}~V_{AB}>0, V_{XY}>0\)
3. \(\text{If}~V_{AB}<0, V_{XY}>0\)
4. \(\text{If}~V_{AB}<0, V_{AX}>0\)
Subtopic: PN junction |
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The truth table for a circuit is given by:
Here, \(X\) represents either \(0\) or \(1\). \(A,B,\) and \(C\) are the inputs. Which of the following is the correct circuit?
| \(A\) | \(B\) | \(C\) | \(Y\) (Output) |
| \(1\) | \(X\) | \(1\) | \(1\) |
| \(0\) | \(1\) | \(X\) | \(1\) |
| All other cases | \(0\) | ||
| 1. |  |
| 2. |  |
| 3. |  |
| 4. |  |
Subtopic: Logic gates |
52%
From NCERT
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In the circuit shown in the diagram given below, \(R\) is a small resistor, \(V_i\) is the input voltage between \(A\) & \(B\) while \(V_o\) is the output voltage between \(C\) & \(D\).
Consider the following two statements and mark the correct option.
Consider the following two statements and mark the correct option.
| (I) | \(\text{If}~V_i>2~\text{V}, ~\text{then}~V_o = V_i\) |
| (II) | \(\text{If}~V_i<2~\text{V}, ~\text{then}~V_o = 2~\text{V}\) |
| 1. | (I) is True. |
| 2. | (II) is True. |
| 3. | (I) and (II) are both True. |
| 4. | (I) and (II) are both False. |
Subtopic: PN junction |
From NCERT
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Consider the circuit shown in the figure given below. The input voltage is \(V_i\), the current through the diode is \(I_z\), and the current through the load is \(I_L\).
| 1. | \(\text{If} ~{V_i}= 15~\text{V}~\text{and}~{R_L}= 40~\Omega, ~\text{and}~{I_z}= 0.375~\text{A}\) |
| 2. | \(\text{If} ~{V_i}= 10~\text{V}~\text{and}~{R_L}= 5~\Omega, ~\text{and}~{I_L}=1~\text{A}\) |
| 3. | \(\text{If} ~{V_i}= 20~\text{V}~\text{and}~{R_L}= 20~\Omega, ~\text{and}~{I_z}= 0.25~\text{A}\) |
| 4. | \(\text{If} ~{V_i}= 20~\text{V}~\text{and}~{R_L}= 10~\Omega, ~\text{and}~{I_z}= 0.5~\text{A}\) |
Subtopic: Applications of PN junction |
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From NCERT
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What will be the change in the current through the \(5~\text V\) cell if the diode \(D\) is reversed?
1. No change
2. Increases by \(0.2~\text A\)
3. Increases by \(0.3~\text A\)
4. Decreases by \(0.2~\text A \)
1. No change
2. Increases by \(0.2~\text A\)
3. Increases by \(0.3~\text A\)
4. Decreases by \(0.2~\text A \)
Subtopic: PN junction |
From NCERT
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The voltage \(V_{AB}=20~\text{V}\) at its peak value, and is sinusoidal in time. The current \(i\) (in amperes), when plotted as a function of time, is given by:
(consider the diodes as ideal.)
(consider the diodes as ideal.)
| 1. |  |
2. |  |
| 3. |  |
4. |  |
Subtopic: PN junction |
From NCERT
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