Q. No.| 1. | only if both inputs are zero. |
| 2. | if either or both inputs are \(1\). |
| 3. | only if both inputs are \(1\). |
| 4. | if any of the inputs is zero. |
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To get output \(Y=1\) for the following circuit, the correct choice for the input is:
| 1. | \(A=1,~ B= 0, ~C=0\) |
| 2. | \(A=1,~ B= 1, ~C=0\) |
| 3. | \(A=1,~ B= 0, ~C=1\) |
| 4. | \(A=0,~ B= 1, ~C=0\) |
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The following table is for which logic gate?
| Input | Output | |
| A | B | C |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
1. AND
2. OR
3. NAND
4. NOT
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The logic behind the 'NOR' gate is that it gives:
| 1. | High output when both the inputs are low. |
| 2. | Low output when both the inputs are low. |
| 3. | High output when both the inputs are high. |
| 4. | None of these |
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| \(A\) | \(B\) | \(Y\) |
| \(1\) | \(1\) | \(1\) |
| \(1\) | \(0\) | \(0\) |
| \(0\) | \(1\) | \(0\) |
| \(0\) | \(0\) | \(0\) |
2. AND
3. NOR
4. OR
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A combination of logic gates is shown in the circuit. If \(A\) is at \(0\) V and \(B\) is at \(5\) V, then the potential of \(R\) is:
| 1. | \(0\) V | 2. | \(5\) V |
| 3. | \(10\) V | 4. | Any of these |
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Logic gates \(X\) and \(Y\) have the truth tables shown below:
| \(X\) | ||
| \(P\) | \(Q\) | \(R\) |
| \(0\) | \(0\) | \(0\) |
| \(1\) | \(0\) | \(0\) |
| \(0\) | \(1\) | \(0\) |
| \(1\) | \(1\) | \(1\) |
| \(Y\) | |
| \(P\) | \(R\) |
| \(0\) | \(1\) |
| \(1\) | \(0\) |
When the output of \(X\) is connected to the input of \(Y\), the resulting combination is equivalent to a single:
1. NOT gate
2. OR gate
3. NAND gate
4. AND gate
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The figure shows a logic circuit with two inputs \(A\) and \(B\) and the output \(C\). The voltage waveforms across \(A\), \(B\), and \(C\) are as given. The logic circuit gate is:
1. \(\text{OR}\) gate
2. \(\text{NOR}\) gate
3. \(\text{AND}\) gate
4. \(\text{NAND}\) gate
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For the logic circuit given below, the output \(Y\) for \(A=0,B=0\) and \(A=1,B=1\) are:
1. \(0\) and \(1\)
2. \(0\) and \(0\)
3. \(1\) and \(0\)
4. \(1\) and \(1\)
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