In the given circuit, the power developed in the \(2~\text{k}\Omega\) resistor is:

 
1. \(36~\text{mW}\)
2. \(12~\text{mW}\)
3. \(144~\text{mW}\)
4. \(72~\text{mW}\)

Subtopic:  Applications of PN junction |
 75%
Level 2: 60%+
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An n-p-n transistor having A.C. current gain of 50 is to be used to make an amplifier of voltage gain 6. What will be the power gain in the amplifier?

1. 300

2. 600

3. 750

4. 400

 90%
Level 1: 80%+
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Current \(I_1\) through the Zener diode shown in the circuit is:
      
1. Zero
2. \(0.6\) mA
3. \(0.2\) mA
4. \(0.8\) mA

Subtopic:  Applications of PN junction |
 62%
Level 2: 60%+
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The output of the OR gate is \(1\):
1. only if both inputs are zero.
2. if either or both inputs are \(1\).
3. only if both inputs are \(1\).
4. if any of the inputs is zero.
Subtopic:  Logic gates |
 88%
Level 1: 80%+
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In an NPN transistor, 108 electrons enter the emitter in 10-8s. If 1% electrons are lost in the base, the fraction of current that enters the collector and the current amplification factor are, respectively:

1. 0.7 and 50

2. 0.9 and 90

3. 0.8 and 49

4. 0.99 and 99

 75%
Level 2: 60%+
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When a transistor is used in a common emitter mode as an amplifier:

1. the base-emitter junction is forward biased.
2. the base-emitter junction is reverse biased.
3. the base-collector junction is forward biased.
4. the input is connected in series with voltage applied across the base-collector junction.
 82%
Level 1: 80%+
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In the circuit shown, \(I_1~\text{and}~I_2\) are respectively:
(If diodes are ideal)
 
1. \(0,0\) 2. \(5~\text{mA},5~\text{mA}\)
3. \(5~\text{mA},0\) 4. \(0,5~\text{mA}\)
Subtopic:  PN junction |
 54%
Level 3: 35%-60%
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The LED:

1. is reverse-biased.
2. is forward-biased.
3. can be made of \(\mathrm{GaAs}.\)
4. both (2) and (3) are correct.
Subtopic:  Applications of PN junction |
 72%
Level 2: 60%+
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Logic gates \(X\) and \(Y\) have the truth tables shown below:

\(X\)
\(P\) \(Q\) \(R\)
\(0\) \(0\) \(0\)
\(1\) \(0\) \(0\)
\(0\) \(1\) \(0\)
\(1\) \(1\) \(1\)
\(Y\)
\(P\) \(R\)
\(0\) \(1\)
\(1\) \(0\)

When the output of \(X\) is connected to the input of \(Y\), the resulting combination is equivalent to a single:
1. NOT gate
2. OR gate
3. NAND gate
4. AND gate

Subtopic:  Logic gates |
 82%
Level 1: 80%+
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The output in the circuit shown in the figure taken across a capacitor is:

          

1. 2.
3. 4.
Subtopic:  Applications of PN junction |
 53%
Level 3: 35%-60%
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