Q. No.
In the following circuit, the output \(Y\) for all possible inputs \(A\) and \(B\) is expressed by the truth table:
| 1. | A | B | Y | 2. | A | B | Y |
| 0 | 0 | 0 | 0 | 0 | 1 | ||
| 0 | 1 | 0 | 0 | 1 | 1 | ||
| 1 | 0 | 0 | 1 | 0 | 1 | ||
| 1 | 1 | 1 | 1 | 1 | 0 | ||
| 3. | 0 | 0 | 1 | 4. | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 | 1 | 1 | ||
| 1 | 0 | 0 | 1 | 0 | 1 | ||
| 1 | 1 | 1 | 1 | 1 | 1 |
1. \(6000~\mathring{A}\)
2. \(4000~\text{nm}\)
3. \(6000~\text{nm}\)
4. \(4000~\mathring{A}\)
The figure shows a logic circuit with two inputs \(A\) and \(B\) and the output \(C\). The voltage waveforms across \(A\), \(B\), and \(C\) are as given. The logic circuit gate is:
1. \(\text{OR}\) gate
2. \(\text{NOR}\) gate
3. \(\text{AND}\) gate
4. \(\text{NAND}\) gate
| 1. | in the case of \(\mathrm{C},\) the valence band is not completely filled at absolute zero temperature. |
| 2. | in the case of \(\mathrm{C},\) the conduction band is partly filled even at absolute zero temperature. |
| 3. | the four bonding electrons in the case of \(\mathrm{C}\) lie in the second orbit, whereas in the case of \(\mathrm{Si},\) they lie in the third. |
| 4. | the four bonding electrons in the case of \(\mathrm{C}\) lie in the third orbit, whereas for \(\mathrm{Si},\) they lie in the fourth orbit. |
The zener breakdown will occur if:
| 1. | the impurity level is low. |
| 2. | the impurity level is high. |
| 3. | the impurity is less on the \(\mathrm{n\text-}\)side. |
| 4. | the impurity is less on the \(\mathrm{p\text-}\)side. |
The logic behind the 'NOR' gate is that it gives:
| 1. | High output when both the inputs are low. |
| 2. | Low output when both the inputs are low. |
| 3. | High output when both the inputs are high. |
| 4. | None of these |
A \(2\) V battery is connected across the points \(A\) and \(B\) as shown in the figure given below. Assuming that the resistance of each diode is zero in forward bias and infinity in reverse bias, the current supplied by the battery when its positive terminal is connected to \(A\) is:
| 1. | \(0.2\) A | 2. | \(0.4\) A |
| 3. | zero | 4. | \(0.1\) A |
In the circuit given below, if \(V(t)\) is the sinusoidal voltage source, then the voltage drop \(V_{AB}(t)\) across the resistance \(R\):
| 1. | is half-wave rectified. |
| 2. | is full-wave rectified. |
| 3. | has the same peak value in the positive and negative half-cycles. |
| 4. | has different peak values during the positive and negative half-cycles. |
2. \(5\) V
3. \(10\) V
4. \(\frac{5}{\sqrt{2}}~\text{V}\)
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