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Q. No.What is the conductivity of a semiconductor sample having electron concentration of \(5\times10^{18}~\text{m}^{-3},\) hole concentration of \(5\times10^{19}~\text{m}^{-3},\) electron mobility of \(2.0~\text{m}^2~\text{V}^{-1}\text{s}^{-1}\) and hole mobility of \(0.01~\text{m}^2\text{V}^{-1}~\text{s}^{-1}?\)
(Take charge of an electron as \(1.6\times10^{-19}~\text{C})\)
1. \(0.59~(\Omega\text-\text{m})^{-1}\)
2. \(1.20~(\Omega\text-\text{m})^{-1}\)
3. \(1.68~(\Omega\text-\text{m})^{-1}\)
4. \(1.83~(\Omega\text-\text{m})^{-1}\)
Subtopic: Types of Semiconductors |
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In the given circuit the current through the Zener diode is:
1. \(3.3~\text{mA}\)
2. \(2.5~\text{mA}\)
3. \(5.5~\text{mA}\)
4. \(6.7~\text{mA}\)
1. \(3.3~\text{mA}\)
2. \(2.5~\text{mA}\)
3. \(5.5~\text{mA}\)
4. \(6.7~\text{mA}\)
Subtopic: Applications of PN junction |
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Level 2: 60%+
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\(\mathrm{Ge ~and ~Si}\) diodes start conducting at \(0.3~\text{V}~\text{and}~0.7~\text{V}\) respectively. In the following figure if \(\mathrm{Ge}\) diode connection are reversed, the value of \({V}_0\) changes by:
(assume that the \(\mathrm{Ge}\) diode has a large breakdown voltage)
1. \(0.8~\text{V}\)
2. \(0.6~\text{V}\)
3. \(0.2~\text{V}\)
4. \(0.4~\text{V}\)
(assume that the \(\mathrm{Ge}\) diode has a large breakdown voltage)
1. \(0.8~\text{V}\)
2. \(0.6~\text{V}\)
3. \(0.2~\text{V}\)
4. \(0.4~\text{V}\)
Subtopic: Applications of PN junction |
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Level 3: 35%-60%
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To get output \('1’\) at \(R, \) for the given logic gate circuit the input values must be:
1. \(X = 0, Y = 1 \)
2. \(X = 1, Y = 1 \)
3. \(X = 1, Y = 0 \)
4. \(X = 0, Y = 0 \)
1. \(X = 0, Y = 1 \)
2. \(X = 1, Y = 1 \)
3. \(X = 1, Y = 0 \)
4. \(X = 0, Y = 0 \)
Subtopic: Logic gates |
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The value of power dissipated across the Zener diode \((V_z=15~\text{V})\) connected in the circuit as shown in the figure is:
1. \(0.5~\text{W}\)
2. \(1.5~\text{W}\)
3. \(3.5~\text{W}\)
4. \(4.0~\text{W}\)
1. \(0.5~\text{W}\)
2. \(1.5~\text{W}\)
3. \(3.5~\text{W}\)
4. \(4.0~\text{W}\)
Subtopic: Applications of PN junction |
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In the logic circuit shown in the figure, if input \(A\) and \(B\) are \(0\) to \(1\) respectively, then the output at \(Y\) :
1. maybe \(0\)
2. must be \(0\)
3. maybe \(1\)
4. must be \(1\)
1. maybe \(0\)
2. must be \(0\)
3. maybe \(1\)
4. must be \(1\)
Subtopic: Logic gates |
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Level 2: 60%+
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Subtopic: Logic gates |
76%
Level 2: 60%+
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Subtopic: Logic gates |
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Level 3: 35%-60%
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The output of the given combination gates represents:
1. NOR gate
2. NAND gate
3. XOR gate
4. AND gate
1. NOR gate
2. NAND gate
3. XOR gate
4. AND gate
Subtopic: Logic gates |
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Level 1: 80%+
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For the given gates combination, the correct truth table will be:
| \(1.\) | \(A\) | \(B\) | \(Y\) | \(2.\) | \(A\) | \(B\) | \(Y\) |
| \(0\) | \(0\) | \(0\) | \(0\) | \(0\) | \(0\) | ||
| \(0\) | \(1\) | \(1\) | \(0\) | \(1\) | \(1\) | ||
| \(1\) | \(0\) | \(1\) | \(1\) | \(0\) | \(1\) | ||
| \(1\) | \(1\) | \(1\) | \(1\) | \(1\) | \(0\) | ||
| \(3.\) | \(A\) | \(B\) | \(Y\) | \(4.\) | \(A\) | \(B\) | \(Y\) |
| \(0\) | \(0\) | \(1\) | \(0\) | \(0\) | \(1\) | ||
| \(0\) | \(1\) | \(0\) | \(0\) | \(1\) | \(0\) | ||
| \(1\) | \(0\) | \(0\) | \(1\) | \(0\) | \(1\) | ||
| \(1\) | \(1\) | \(0\) | \(1\) | \(1\) | \(0\) | ||
Subtopic: Logic gates |
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Level 1: 80%+
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